مجله فصل مشترک ها، لایه های نازک و سیستم های با بعد کم
طراحی و تحلیل VCO براساس سی ان فت با افست فرکانسی قابل کنترل
نوع مقاله : مقاله پژوهشی
نویسندگان
1 گروه مهندسی الکترونیک، دانشگاه آزاد اسلامی، واحد تهران غرب، تهران، ایران
2 گروه الکترونیک، دانشگاه آزاد اسلامی واحد یادگار امام خمینی شهر ری، تهران، ایران
موضوعات
[1] Codreanu, E. Vasile, E. Iliescu, M. Avram, A. Badoiu, and C. Ravariu, “Free carrier lifetime reduction in silicon by electron-beam irradiation,” in 23rd IEEE International Semiconductor Conference (CAS 2000),Location: Sinaia, Romania, pp. 255-258, 10-14. 2000
[2] I. Sayed, M. M. Abutaleb, and Z. B. Nossair, “Optimization of CNFET parameters for high performance digital circuits,” Advances in Materials Science and Engineering, 2016, 1–9. DOI: 10.1155/2016/6303725
[3] U. Alam, C. M. S. Rogers, N. Paydavosi, K. D. Holland, S. Ahmed, and M. Vaidyanathan, “RF linearity potential of carbon-nanotube transistors versus MOSFETs,” IEEE transactions on nanotechnology, vol. 12, no. 3, pp. 340–351, 2013. DOI: 10.1109/tnano.2013.2248019
[4] Kumar, A. Raman, R. Ranjan, and R. K. Sarin, “High-frequency CNTFET-based voltage-controlled oscillator for PLL application,” Micro-Electronics and Telecommunication Engineering. https://doi.org/10.1007/978-981-15-2329-8_42
[5] Abiri and A. Darabi, “A novel modified GDI method-based clocked M/S-TFF for future generation,” Microprocessors and Microsystems, vol. 60, pp. 122-137, July 2018
[6] Rutherglen and et al., “Wafer-scalable, aligned carbon nanotube transistors operating at frequencies of over 100 GHz,” Nature Electron, vol. 2, no. 11, pp. 530-539, 2019
[7] Khaleqi Qaleh Jooq, A. Bozorgmehr, and S. Mirzakuchaki, “A low-power delay stage ring VCO based on wrap-gate CNTFET technology for X-band satellite communication applications,” Int J Circ Theor Appl, vol. 49, no. 1, pp. 142-158, 2020. https://doi.org/10.1002/cta.2864
[8] Ramazani and et al., “CMOS ring oscillator with combined delay stages,” Int J Electron Commun (AEÜ), vol. 68, no. 6, pp. 515-519, 2014. http://dx.doi.org/10.1016/j.aeue.2013.12.008
[9] Jafar and S. Sheikhaei, “Low phase noise LC VCO with sinusoidal tail current shaping using cascode current source,” AEU-Int J Electron Commun, vol. 83, pp. 114-122, 2018
[10] Honaryar, S. A. Hosseini, and S. H. A. Komleh, “A novel model of binary and ternary Schmitt triggers based on multi-threshold voltage in nanoelectronics,” International Journal of Electronics and Communications (AEÜ), 137, 153804, 2021. https://doi.org/10.1016/j.aeue.2021.153804
[11] Sarbazi, R. Sabbaghi-Nadooshan, and A. Hassanzadeh, “A CNT based VCO with extremely low phase noise and wide frequency range for PLL application,” Int J Numer Model, vol. 34, no. 5, 2021. https://doi.org/10.1002/jnm.2891
[12] (2008). Stanford university CNFET model website. Stanford university, stanford, CA [Online]. Available: http://nano.stanford.edu/model.php?id=23
[13] Ghelichkhan, S. A. Hosseini, and S. H. P. Komleh, “ Multi-digit binary-to-quaternary and quaternary-to-binary converters and their applications in nanoelectronics,” Circuits , Systems and Signal Processing, vol. 39, no. 4, pp. 1920-1942, 2020. DOI:10.1007/s00034-019-01235-6
[14] Deng and H. S. P. Wong, “A compact SPICE model for carbon-nanotube field effect transistors Including non Idealities and its application-Part I: Model of the intrinsic channel region,” IEEE Trans. Electron Devices, vol. 54, no. 12, pp. 3186–3194, Dec. 2007
[15] Deng and H. S. P. Wong, “A compact SPICE model for carbon-nanotube field effect transistors Including non Idealities and its application-Part II: Full device model and circuit performance benchmarking,” IEEE Trans. Electron Devices, vol. 54, no. 12, pp. 3195-3205, Dec. 2007
[16] H. Moaiyeri, K. Navi, and O. Hashemipour, “Design and Evaluation of CNFET- Based Quaternary Circuits,” Circuits, Systems, and Signal Processing, vol. 31, no. 5, pp. 1631-1652, Oct. 2012
[17] Weste and K. Eshraghian, “Principles of CMOS VLSI design,” (A systems perspective), 2nd ed. reading, MA: Addison Wesley, 1993
[18] Ghanbari Khorram and A. Kokabi, “Proposed 3.5 mW CNTFET-MOSFET hybrid CSVCO for power-efficient gigahertz applications,” Circuit World, vol. 46, no. 3, 2020. DOI 10.1108/CW-03-2019-0022
[19] Nakhale, M. N. Thakare, and N. M. Chore, “Physical Design of VCO with Wide Frequency Tuning Range Using Deep Submicron CMOS Technology,” International Journal for Research in Applied Science & Engineering Technology (IJRASET), vol. 10, no. 4, Apr. 2022. DOI:10.22214/ijraset.2022.41437
[20] Borgmans, R. Riem, and P. Rombouts, Senior Member, IEEE, “The Analog Behavior of Pseudo Digital Ring Oscillators Used in VCO ADCs,” IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS, vol. 68, no.7, July 2021.
)